Verilog Language
Introduction
This page is meant to help understand how to approach the language. There are three levels of abstraction.
Way to describe Hardware
- Gate Level
- Dataflow Level
- Behavioral Level
Types of Logic
- Combinational Logic
- Sequential Logic
Combinational Logic
This is where the outputs are a simple function of the inputs. (Sounds like pure functions
2 to 1 Multiplexer using Combinational
This example shows the 3 approaches we can use to describe the hardware
Gate Level
This was quite useful as I have some knowledge of gates and boolean logic so it starts to make a bit of sense in verilog. Here is the truth table for the 2 to 1 multiplexer
To model this at the gate level we could do this
Dataflow Level
And now the Dataflow level. This does look a lot like boolen logic and is very unreadable.
Behavioral Level
Finally the Behavioral Level which does seem more in my wheel house. The code uses a procedure block where the code only executes when there is a change in the signal
Sequential Logic
Sequential logic uses memory and state. It uses combinational logic too.
A bit more complex and a bit of memory required on my part.
This diagram shows a d-flip flop where the input is the same as the output on a rising edge. The code only executes on a positive edge. It uses a non bloicking assignment <=